blob: 8cd1bf009591c5b79796d0e1ac01a9293386bdd6 [file] [log] [blame]
/*
* Copyright (c) 2011 Nokia and others.
* All rights reserved. This program and the accompanying materials
* are made available under the terms of the Eclipse Public License v1.0
* which accompanies this distribution, and is available at
* http://www.eclipse.org/legal/epl-v10.html
*
* Contributors:
* Nokia - Initial API and implementation
*/
/* WinHWBkptMgr.h
*
* This class manages the use of the X86 Hardware Debug Registers
* to set Hardware Breakpoints and Hardware Watchpoints.
*
* Rules governing the use of X86 Debug registers:
* - there are four debug registers (DR0, DR1, DR2 & DR3)
* which can be set with an address in memory that will be
* monitored for access
* - there is a management debug register (DR7) that contains
* the bits governing which of the DR0-DR3 registers will be
* monitored, the type of access, and the size of the memory
* to be monitored.
* - eligible access modes are {execution, write, read+write}
* - eligible sizes are 1, 2, 4 and 8
* - monitoring is only legal for each size at proper alignment
* (i.e. a watchpoint of size 8 must have an address that is
* aligned on a 8-byte boundary; a watchpoint of size 2 can
* be on any 2-byte boundary; a watchpoint of size 1 can be
* at any address)
*
* This implementation currently allows watchpoints only, and
* will monitor memory regions of sizes from 1-32, depending
* upon alignment, by combining the use of available registers
* when necessary and available.
*
* The use of this manager thus restricts the caller to a
* maximum of 4 hardware watchpoints, and fewer if any user
* watchpoints are unaligned for size and/or greater in size
* than 8 bytes.
*
* The use of this manager also restricts watchpoints to being
* identified on a per-process basis. The thread accessing the
* watchpoint will be identified, but the caller cannot
* establish a watchpoint only for specific threads; all
* threads in a process will be established.
*
* This implementation does not currently allow hardware
* breakpoints for execution, nor does it manage debug registers
* in such a way as to optimize for overlapping watchpoint
* regions.
*
* Created on: Aug 17, 2011
* Author: bkirk
*/
#ifndef WINHWBKPTMGR_H_
#define WINHWBKPTMGR_H_
#include "TCFContext.h"
#define MAX_HWBP 4
struct TBreakpoint;
class WinHWBkptMgr {
friend class WinProcess;
friend class WinThread;
WinHWBkptMgr();
typedef unsigned char DRFlags;
typedef unsigned char DRMask;
typedef unsigned char DRNum;
int SetHardwareBreak(TBreakpoint*);
int ClearHardwareBreak(TBreakpoint*);
typedef unsigned char Mode;
typedef unsigned char SizeBits;
static const Mode execute = 0x00;
static const Mode write = 0x01;
// 0x02 is defined to mean break on I/O read/write, unsupported
static const Mode readwrite = 0x03;
static const Mode invalid = 0x04;
struct DbgRegInfo {
ContextAddress address;
DRFlags flags;
};
struct HWBreakInfo {
TBreakpoint* tcfBp;
DRMask inUse; // mask of the regs used for this hw-break
Mode accessMode; // accessMode to use for all regs used
DbgRegInfo dbgReg[MAX_HWBP];
HWBreakInfo() : tcfBp(NULL), inUse(0) {}
};
DRMask inUse;
unsigned char InUseCount();
unsigned char UnusedCount();
DRMask UseUnusedRegister();
HWBreakInfo hwBkpt[MAX_HWBP];
unsigned char GetUnusedWatchpoint();
static Mode sDR7ModeBitsMap(unsigned char i);
static SizeBits sDR7SizeBitsMap(unsigned char i);
};
#endif /* WINHWBKPTMGR_H_ */